Silicon-based hacking problems are not yet seen as a threat to security on the internet.
But this may be because any breaches of security at the silicon level are not reported.
It could also be because there are easier ways to penetrate computer networks. Most of the security problems which the internet is seeing are because people are hacking intro user level software and apps.
This may be annoying, but it is not seen as a major problem. Hacks can be stopped and blocked relatively easily with software fixes and firewalls.
But Wally Rhines, CEO, Mentor Graphics believes there will be a different scale of problem if systems are hacked at the operating system or silicon level.
“It will be a much bigger problem affecting many more people,” says Rhines.
However, he believes there a number of design options available which chip designers can use to protect ICs from the hackers.
Hacking the silicon could involve unlocking an existing IC or introducing counterfeit chips into the supply chain, but a much bigger problem could be when the hackers have the ability to embed malicious logic elements inside the chip.
“Today design tools verify that a chip does what it is designed to do, in future we will have the tools to verify that a chip does not do what it shouldn’t,” says Rhines.
Unlocking a chip to discover how it operates so it can be tampered with is typically carried out in one of two ways. Either through analysis of the power profile of the device or through an analysis of its electromagnetic footprint.
“Both of these techniques make it possible to identify the activity of the chip and then faults can be injected,” says Rhines.
To tackle this form of silicon hacking you can harden the chip’s intellectual property (IP) and make it less prone to attacks.
Another countermeasure, says Rhines, is to make the chip harder to ‘read’ by spreading the signals around the chip and so make them more difficult to trace by the hacker.
“It is possible to include this in the design simulation and emulation before committing to silicon,” says Rhines.
“This can never be perfect, but if a company can do it better than its competitors then it has differentiation,” says Rhines
There is a growing threat from counterfeit parts entering the supply chain which also raises the threat of tampering. This is made easier because ICs travel widely in their life cycle; from design to fab to the OEM customer.
And the potential for introducing counterfeit parts is made greater because of the excess inventory and re-cycled ICs in the supply chain.
This is being tackled by adding greater traceability in the supply chain. The US authorities have been particularly active in this area with the AS6081 Counterfeit Avoidance Standard to ensure component traceability amongst independent component suppliers and distributors.
Rhines says it is also possible to design locks into the chip to provide better traceability.
Each IC could be given its own unique authentication code, or fingerprint, but this likely to add unacceptable cost to chip.
For example, an on-chip ‘odometer’ could track its movement. Or the chip could have an activation code which can only be unlocked with an encrypted key supplied by the manufacturer.
But even these countermeasures are no guarantee against hacking, says Rhines.
The biggest threat will come from a so-called Trojan attack where rogue hardware IP is introduced into the chip at the design stage.
“I believe a Trojan attack on the silicon will become a big problem,” says Rhines. “The complexity of the supply chain for chip design and production makes it vulnerable.”
The Trojan could be rogue IP designed into the chip, which is triggered by a specific event or time.
Use of third party IP or IP code re-use will make the introduction of Trojan IP easier, says Rhines.
To tackle this deep level of attack, Rhines believes it will become necessary for the chip to protect itself by monitoring its own activity.
“I believe it will become standard in the future to embed a co-processor in an IC design to monitor the activity within the chip,” says Rhines.
Rhines said work in this area has already started in the US and the government is supporting the semiconductor industry in the development of technologies to make silicon more secure.
But this is only in its early stages and government funding of $1m for the initiative looks surprisingly modest.
Rhines says he is starting to see customers asking for some level of silicon authentication, but there can be a cost associated with greater security.
Rhines believes it will take a major silicon security issue to convince companies of the need for greater silicon authentication.
“This is usually needed to trigger a big market reaction,” says Rhines, “but I am seeing a demand for silicon authentication from customers.”
“Until the customers of the chip companies say they will not buy ICs until the suppliers do something little is likely to happen,” says Rhines.
“But I do believe that an on-chip security monitoring requirement will happen at some time,” says Rhines.
Rhines believes the EDA industry must provide the necessary design and verification tools to support the various forms of on-chip authentication and activity monitoring.
This starts with secure software hypervisors. It includes partitioning the processor operation to keep critical software apart from more easily hacked applications software.
At the silicon level formal verification tools will be used to identity Trojan IP and to isolate it.
“I believe this will become an important new area of activity for EDA companies and the necessary research has already started, in companies and universities,” says Rhines.
Source: http://ift.tt/1EFY0xZ
from hacker samurai http://ift.tt/1xyEM0n
via IFTTT
No comments:
Post a Comment